By Mustafa Aktan, Dursun Baran (auth.), José L. Ayala, Braulio García-Cámara, Manuel Prieto, Martino Ruggiero, Gilles Sicard (eds.)
This ebook constitutes the refereed complaints of the twenty first foreign convention on built-in Circuit and method layout, PATMOS 2011, held in Madrid, Spain, in September 2011. The 34 revised complete papers provided have been conscientiously reviewed and chosen from various submissions. The paper function rising demanding situations in methodologies and instruments for the layout of upcoming generations of built-in circuits and platforms and concentration particularly on timing, functionality and gear intake in addition to architectural facets with specific emphasis on modeling, layout, characterization, research and optimization.
Read or Download Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation: 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings PDF
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To this end, we use a permutation encoding [9], where every chromosome is a string of labels, that represents the block placement sequence. Figure 2 depicts the genetic operators used in our MOGA on a floorplanning problem. a is formed by 8 blocks: 4 cores Ci (i = 1, 2, 3, 4) and 4 memories Li (i = 1, 2, 3, 4). (a) Cycle crossover (b) Swap mutation or rotation Fig. 2. MOGA operators: Cycle crossover and two mutation operators (swap or rotate) In every cycle of the optimization process (called generation) two chromosomes are selected by tournament.
For idle memory banks, lowering the supply to the DRV enables dramatic reduction of standby power. However the DRV depends on the extremes of local mismatch variation [4] and design-time decisions may need to be so conservative as to render this technique useless. DRV-tracking methods exist [4]. One is to bias the array supply to twice the threshold voltage of the bit-cell devices. Although this is sufficient to preserve data, it is not a necessary condition. Further reduction is possible. Another is the canary cell method which must be calibrated against a known DRV distribution.
These parameters are fixed according to previous research. 90 and the mutation probability pm to 1/#blocks (see [12]). We consider a fixed area equal to the total sum of the areas of the different elements. This value is increased in a 15% as no solutions are found with less area. The configurations obtained are chosen among a front of non-dominated solutions returned by the floorplanner. Finding the best solution of the non-dominated front is out of the scope of this paper and is postponed to a future work.
